The present invention relates to a method of manufacturing a semiconductor device.
In a manufacturing process for manufacturing a variety of semiconductor devices, a plurality of semiconductor devices are fabricated on the same semiconductor substrate and the semiconductor devices thus formed are isolated from each other or interconnected with each other by a variety of high temperature heating processes.
Further, ions are implanted in order to form an LDD (lightly-doped drain) structure and a source-drain region of a semiconductor device. After ions were implanted, an annealing (referred to hereinafter as "activation annealing", if necessary) is required in order to recover a crystallinity of the semiconductor substrate or to electrically activate implanted acceptor ions and donor ions.
Furthermore, in order to reduce a contact resistance, a silicide layer that is a compound layer of silicon (Si) and a refractory metal (e.g., W, Mo, Ti, etc.) or metal, such as Pt and Pd should be heated at high temperature. As the activation annealing or high temperature heating, there are used a furnace annealing and a rapid thermal annealing (simply referred to as "RTA"), such as a lamp annealing or the like.
On the other hand, as the integration level of the semiconductor device is increased, individual semiconductors are reduced in size and therefore the source-drain region of the shallow junction is required. When the activation annealing is implemented according to the furnace annealing, a diffusion layer is increased in depth, which cannot meet with requirements such that the semiconductor device is made microscopic and increased in integration level by the shallow junction of the source-drain region.
When the activation annealing is implemented by the RTA, it can be expected that the resultant semiconductor device is made microscopic and is increased in integration level as compared with those achieved by the furnace annealing. However, there is the limit that the semiconductor device is made smaller and increased in integration level more than ever. To solve this problem, an activation annealing using a pulse laser radiation is proposed as one of the methods for forming a shallow junction.
Since pulse laser energy is absorbed by the extremely shallow portion (about 10 nm) of the surface of the semiconductor substrate, the extremely shallow portion of the surface of the semiconductor substrate is heated up to the melting point with the irradiation of the pulse laser and therefore the annealing of the depth of about 100 nm is made possible by heat conduction. Thus, the annealing using the pulse laser is suitable for the activation annealing used when the shallow LDD structure or the source-drain region of the shallow junction is formed.
However, when the source-drain region is formed by the activation annealing in the fabrication of the semiconductor device, electrode portions of a plurality of microscopic semiconductor devices were already formed on the same semiconductor substrate with the result that, upon laser annealing, the electrode portions of the microscopic semiconductor devices also are simultaneously radiated with laser beams and heated at high temperature.
It is customary that a gate electrode and an interconnection pattern are formed on an insulating film, such as an oxide film (SiO.sub.2 film, etc.). Also, it is known that the insulating film have microscopic heat conductivity and is very resistant to transmittal of heat. Therefore, since the electrode portion that was heated at high temperature of about 1400 to 2000.degree. C. with the radiation of laser beams is formed on the insulating film, the electrode portion is difficult to cool. There is then the problem that the microscopic gate electrode and interconnection pattern will be deformed by resultant heat.
To solve this problem, it is proposed that heat generated on the gate electrode and the interconnection pattern is suppressed by lowering the laser power. According to this method, an activation ratio of acceptor ions and donor ions in the LDD region is lowered and a resistance is increased so that the semiconductor device is lowered in operation speed. Moreover, since the heating temperature is low, a crystallinity of the semiconductor substrate is deteriorated and a leakage current is increased.